Falcon co-founder and UCLA Chancellor’s Professor Jason Cong (Computer Science and Electrical Engineering at the UCLA Henry Samueli School of Engineering and Applied Science), has been selected to receive the IEEE Computer Society 2016 Technical Achievement Award.
The award is given for outstanding contributions in computer and information science and engineering. The society cited Cong “for setting the algorithmic foundations for high-level synthesis of field programmable gate arrays.”
“I am truly honored by this recognition,” Cong said. “It is a tribute to the graduate students and postdocs who worked on the high-level synthesis research in our lab. I am also glad to see that our high-level synthesis technology is widely used in industry and academia.”
Cong and researchers in his VLSI Architecture, Synthesis and Technology (VAST) Lab have developed and optimized technologies for designing integrated circuits using high-level programming languages. These advances have made it possible for software programmers around the world — even if they do not have expertise in more complex circuit design languages — to design circuits for big-data computing, wireless, consumer, medical and other applications.
In 2010, Cong received the IEEE Circuits and System Society Technical Achievement Award ”for seminal contributions to electronic design automation, especially in FPGA synthesis, VLSI interconnect optimization, and physical design automation.” He is the only person to receive a technical achievement award from both the IEEE Computer Society and the IEEE Circuits and Systems Society.
Cong is director of the Center for Domain-Specific Computing (CDSC), funded by the National Science Foundation Expeditions in Computing program. CDSC seeks to create orders-of-magnitude efficiency improvement in computing through domain-specific, customizable applications. He is also a distinguished visiting professor at Peking University and co-director of UCLA/Peking University Joint Research Institute in Science and Engineering. He is a fellow of both IEEE and the Association for Computing Machinery.
The IEEE Computer Society will present the award to Cong and four other 2016 winners in Atlanta in June.
Dr. Cong is also a successful serial entrepreneur. He was the founder and the president of Aplus Design Technologies (1999 – 2003), a UCLA spin-off that developed the first commercially available FPGA architecture evaluation tool and physical synthesis tool, which were licensed by most FPGA companies and OEMed to their customers. Aplus was acquired by the Magma Design Automation in 2003 (now part of Synopsys). Dr. Cong was also a co-founder and the chief technology advisor of AutoESL Design Technologies (2006-2011), another UCLA spin-off that commercialized his research on high-level synthesis (HLS) for automatic synthesis of behavior-level C/C++ specifications into highly optimized RTL code – an effort that many EDA companies tried but failed for over two decades. The AutoESL tool (renamed to Vivado HLS after Xilinx acquisition in 2011) becomes the most successful and most widely used FPGA HLS tool in the history, with over tens of thousands of users from over 3,000 companies and universities worldwide (as of Feb. 2015). He was also a co-founder and the chief scientist of Neptune Design Automation (2011-2013), which produced the fastest and most scalable FPGA physical design tool at its time (acquired by Xilinx in 2013).
A video of the talk can be found on Youtube.