Falcon Acceleration for Computer Vision Applications
Enabling applications of the future
The growth in machine vision acceleration is not only attributed to growth in demands for lower cost and higher quality requirements in the industrial sector but more so by the fact that other industries are rapidly increasing adoption. Deep Learning algorithms not only allow image recognition and detection with extremely high accuracy but these algorithms can also understand relationships. As such, algorithms are now leading breakthrough applications in retail, medical imaging, assisted and autonomous driving, surveillance security and more.
Algorithms used in computer vision and image processing are by nature computationally intensive as they translate visual data into quantitative and qualitative insights. A full production algorithm requires a wide range of workloads for sorting, classification, filtering, edge detection, and color processing. All these processes can run into performance obstacles due to currently available compute. If your application performance is being limited from a CPU only architecture, FPGA acceleration can seamlessly be done with Merlin Compiler by using our push-button C/C++ to FPGA.
Common Computer Vision Workloads
that Benefit from FPGA Acceleration:
Security / Surveillance
Retail & Entertainment
Parallelized algorithms on FPGA acceleration platforms such as DNNs can result in up to X runtime improvement.
Leverage Existing Codebase
The flexible logic of FPGAs and the automated algorithm implementation with Merlin eliminates the barrier presented by available ASICs to frequently update business-critical ML algorithms.
Up to 25X better performance per watt and 50-75x latency improvement compared to CPU/GPU implementations.
With the rapid development of heterogenous public and private data centers, featuring both CPU and FPGA acceleration, algorithms such as edge and motion detection can be accelerated by leveraging FPGAs. Falcon Computing’s Merlin Complier makes porting C/C++ algorithms from a CPU to an FPGA Acceleration platform a snap. No need to rewrite, you get all the performance in a fraction of the effort.
Today with Merlin Compiler
in the Cloud.